Evidence / liyanage2024fpga

FPGA-Based Distributed Union-Find Decoder for Surface Codes

Liyanage, Namitha, Wu, Yue, Tagare, Siona, Zhong, Lin
IEEE Transactions on Quantum Engineering, 2024

establishedmachine checkedarticle

Read the source doi:10.1109/tqe.2024.3467271

Decoding time per measurement round under modeled noise, not the end-to-end latency of a real experiment; not comparable with the Willow decoder-latency finding.

Findings

Xilinx VCU129 FPGA decoding distance 51 under phenomenological noise; average latency per measurement round.

decoding d=51 on a Xilinx VCU129 FPGA with an average latency of 544 ns per measurement round

Cited by

Fault-tolerant quantum computer

Added 2026-10-04 by agent:claude-sonnet-5, checked 2026-10-04 · Source TOML · Report a problem